A microfabricated ladder type TWT has been modeled, simulated, and analyzed for 50 GHz V-band operation. Millimeter-wave TWT devices are used for high power applications, including scientific research, telecommunications, and military and security. TWTs have been constructed out of various shapes. A helix shape is common in TWT amplifiers, but presents problems as frequency increases. At higher frequencies, the device dimensions become smaller, causing the helix design to be difficult to fabricate. The ladder type slow wave circuit has a symmetric configuration that can easily be microfabricated at high frequencies in a clean room environment. The characteristics of a ladder include wide bandwidth, fundamental forward interaction (high rate gain), high interaction impedance (high dispersion and low group velocity), and low cost assembly.
Cold test and hot test simulations have been performed. For the cold test, HFSS (High Frequency Structure Simulator) based on the finite element method has been employed. VORPAL simulation software has been used for the hot test. VORPAL is a PIC simulator that uses the CFDTD method. The ladder circuit was simulated using VORPAL 4.0.0 on a Linux system with two quad-core 2.33 GHz processors. Using open MPI, up to eight cores were scheduled. Simulation time can take ten days on this system. A compute cluster was also used. When scheduled with thirty-two nodes, runs took four days. Figure 1 shows the three dimensional model of the ladder structure in the ridged waveguide. An oval shaped beam tunnel supported by dielectric chips was used. Iterative simulation analyses optimized geometries including major and minor radius ratio of the oval tunnel, rug gap, and ridge height. The calculated cutoff frequency, in general, increases as the beam tunnel narrows and as the rug gap decreases. In order to maximize the bandwidth, the Pierce impedance and dispersion data were observed using the small signal analysis. The dispersion curve of the V-band ladder slow-wave circuit predicted by the HFSS simulations employing periodic boundary conditions is shown in Figure 2. The lower band is the symmetric ladder mode and the upper band is the anti-symmetric ladder mode. The electron beam line operating at 22 kV is also shown. The parameters of a basic beam optics design are listed in Table 1. The gain dependence on the number of ladder periods is shown in Figure 3. The circuit gain was calculated for a 68-period ladder structure to save the computation time. The perfectly matched layer (PML) boundary condition was applied for the last 8-period to prevent reflections. However, the length of the ladder circuit will not be limited to 68-period in reality. The input power was varied from 0.1 to 100 W for gain calculation. The results are shown in Figure 4. As the input power is increased, gain significantly dropped off near 100 W of input power, signifying the saturation region had been reached. Figures 5 (a) and (b) show particle velocity versus axial position at linear and saturation regions, respectively. In the linear region (Figure 5(a)), electrons are velocity modulated but do not bunch into groups. In the saturation region (Figure 5(b)), the faster electrons catch up the slower electrons and they bunch into groups. Successful modeling, simulation, and analysis of the ladder type TWT at 50 GHz have been performed. This model of the ladder circuit, using VORPAL, can now easily be modified for use at other frequencies for various applications.
* Acknowledgements: This work has been supported in part by the University of Colorado at Colorado Springs.